Electronic circuit designs are commonly specified using language-based descriptions. For example, various hardware description languages (HDLs) are available for specifying a design. To aid in quickly preparing a design, pre-defined libraries of modules provide building blocks, which may be selected and integrated with application-specific logic.
An example language-based design entry tool is the Xilinx Platform Studio, which uses a set of text files to model a design at a system level. For example, a bus abstraction hides the details of the many signals involved in interconnecting the bus arbiters, the block components, and various multiplexers that would appear in a low-level implementation description. The Xilinx Platform Studio provides the capability to link together HDL library modules into a system with a tool-specific language.
In some instances, a graphical representation of a design may be more useful than the textual specification. A graphical representation may provide feedback to the designer for verification that the language-based description specifies the intended design. In addition, a graphical representation may be used to effectively communicate aspects of the design between members of a system design team.
The graphical representation of a design often is of the low-level implementation of the design. The low-level representation, however, may obscure useful high-level design information with low-level details. For example, in complex designs with a high number of interconnects the sheer number of interconnections can make it difficult to trace the basic connections between functional blocks.
The present invention may address one or more of the above issues.